MT48LC16M4A2TG View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC16M4A2TG' PDF : 55 Pages View PDF
READ – DQM OPERATION 1
T0
T1
T2
T3
T4
T5
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
READ
NOP
NOP
NOP
DQM /
DQML, DQMH
tAS tAH
tCMS tCMH
A0-A9, A11
A10
BA0, BA1
ROW
tAS tAH
ROW
tAS tAH
BANK
COLUMN m2
ENABLE AUTO PRECHARGE
DISABLE AUTO PRECHARGE
BANK
DQ
tRCD
tAC
tLZ
CAS Latency
tOH
DOUT m
tHZ
tAC
tLZ
64Mb: x4, x8, x16
SDRAM
T6
T7
T8
NOP
NOP
NOP
tAC
tOH
DOUT m + 2
tOH
DOUT m + 3
tHZ
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL*
tAC(3)
tAC(2)
tAH
tAS
tCH
tCL
tCK(3)
tCK(2)
tCKH
-6
-7E
-75
-8E
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
5.5
5.4
5.4
6
ns
–
5.4
6
6
ns
1
0.8
0.8
1
ns
1.5
1.5
1.5
2
ns
2.5
2.5
2.5
3
ns
2.5
2.5
2.5
3
ns
6
7
7.5
8
ns
–
7.5
10
10
ns
1
0.8
0.8
1
ns
*CAS latency indicated in parentheses.
SYMBOL*
tCKS
tCMH
tCMS
tHZ(3)
tHZ(2)
tLZ
tOH
tRCD
-6
-7E
-75
-8E
MIN MAX MIN MAX MIN MAX MIN MAX UNITS
1.5
1.5
1.5
2
ns
1
0.8
0.8
1
ns
1.5
1.5
1.5
2
ns
5.5
5.4
5.4
6
ns
–
5.4
6
6
ns
1
1
1
1
ns
2
3
3
3
ns
18
15
20
20
ns
NOTE:
1. For this example, the burst length = 4, and the CAS latency = 2.
2. x16: A8, A9 and A11 = “Don’t Care”
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
47
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003, Micron Technology, Inc.
Share Link: 
