MT48LC16M4A2TG View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC16M4A2TG' PDF : 55 Pages View PDF
64Mb: x4, x8, x16
SDRAM
WRITE – WITH AUTO PRECHARGE 1
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
WRITE
NOP
DQM /
DQML, DQMH
A0-A9, A11
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
ROW
tAS tAH
BANK
tCMS tCMH
COLUMN m2
ENABLE AUTO PRECHARGE
BANK
DQ
tRCD
tRAS
tRC
tDS tDH
DIN m
tDS tDH
DIN m + 1
NOP
tDS tDH
DIN m + 2
NOP
NOP
tDS tDH
DIN m + 3
tWR
NOP
NOP
ACTIVE
ROW
ROW
BANK
tRP
DON’T CARE
TIMING PARAMETERS
-6
-7E
-75
-8E
SYMBOL* MIN
tAH
1
tAS
1.5
tCH
2.5
tCL
2.5
tCK(3)
6
tCK(2)
–
tCKH
1
tCKS
1.5
tCMH
1
MAX
MIN MAX
0.8
1.5
2.5
2.5
7
7.5
0.8
1.5
0.8
MIN
0.8
1.5
2.5
2.5
7.5
10
0.8
1.5
0.8
MAX
MIN MAX UNITS
1
ns
2
ns
3
ns
3
ns
8
ns
10
ns
1
ns
2
ns
1
ns
*CAS latency indicated in parentheses.
NOTE:
1. For this example, the burst length = 4.
2. x16: A8, A9 and A11 = “Don’t Care”
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
-6
-7E
-75
-8E
SYMBOL* MIN MAX MIN MAX MIN MAX MIN MAX UNITS
tCMS
tDH
tDS
tRAS
tRC
tRCD
tRP
tWR
1.5
1.5
1.5
2
ns
1
0.8
0.8
1
ns
1.5
1.5
1.5
2
ns
42 120,000 37 120,000 44 120,000 50 120,000 ns
60
60
66
70
ns
18
15
20
20
ns
18
15
20
20
ns
1 CLK
1 CLK
1 CLK
1 CLK
–
+ 6ns
+ 7ns
+ 7.5ns
+ 7ns
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
49
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003, Micron Technology, Inc.
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