MT48LC16M4A2TG View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT48LC16M4A2TG' PDF : 55 Pages View PDF
64Mb: x4, x8, x16
SDRAM
WRITE – WITHOUT AUTO PRECHARGE 1
T0
T1
T2
T3
T4
T5
T6
T7
CLK
tCK
tCL
tCH
tCKS tCKH
CKE
tCMS tCMH
COMMAND
ACTIVE
NOP
WRITE
NOP
NOP
NOP
PRECHARGE
NOP
DQM /
DQML, DQMH
A0-A9, A11
A10
BA0, BA1
tAS tAH
ROW
tAS tAH
ROW
tAS tAH
BANK
tCMS tCMH
COLUMN m3
DISABLE AUTO PRECHARGE
BANK
ALL BANKS
SINGLE BANK
BANK
tDS tDH
tDS tDH
tDS tDH
tDS tDH
DQ
tRCD
tRAS
tRC
DIN m
DIN m + 1
DIN m + 2
DIN m + 3
t WR 2
tRP
T8
ACTIVE
ROW
ROW
BANK
DON’T CARE
TIMING PARAMETERS
-6
SYMBOL* MIN MAX
tAH
1
tAS
1.5
tCH
2.5
tCL
2.5
tCK(3)
6
tCK(2)
–
tCKH
1
tCKS
1.5
tCMH
1
-7E
MIN MAX
0.8
1.5
2.5
2.5
7
7.5
0.8
1.5
0.8
-75
MIN MAX
0.8
1.5
2.5
2.5
7.5
10
0.8
1.5
0.8
-8E
MIN MAX UNITS
1
ns
2
ns
3
ns
3
ns
8
ns
10
ns
1
ns
2
ns
1
ns
*CAS latency indicated in parentheses.
-6
-7E
-75
-8E
SYMBOL* MIN MAX MIN MAX MIN MAX MIN MAX UNITS
tCMS
1.5
1.5
1.5
2
ns
tDH
1
0.8
0.8
1
ns
tDS
1.5
1.5
1.5
2
ns
tRAS
42 120,000 37 120,000 44 120,000 50 120,000 ns
tRC
60
60
66
70
ns
tRCD
18
15
20
20
ns
tRP
18
15
20
20
ns
tWR
12
14
15
15
ns
NOTE:
1. For this example, the burst length = 4, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 15ns is required between <DIN m> and the PRECHARGE command, regardless of frequency.
3. x16: A8, A9 and A11 = “Don’t Care”
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
64Mb: x4, x8, x16 SDRAM
64MSDRAM_F.p65 – Rev. F; Pub. 1/03
48
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2003, Micron Technology, Inc.
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