Figure 44: Single WRITE With Auto Precharge
T0
T1
T2
T3
T4
CLK
tCK
tCKS tCKH
tCL
tCH
CKE
tCMS tCMH
Command
ACTIVE
NOP
WRITE
NOP
NOP
DQM
tCMS tCMH
Address
A10
BA0, BA1
tAS tAH
Row
tAS tAH
Row
tAS tAH
Bank
Column m
Enable auto precharge
Bank
DQ
tRCD
tRAS
tRC
tDS tDH
DIN
tWR
Note: 1. For this example, BL = 1.
128Mb: x32 SDRAM
PRECHARGE Operation
T5
T6
T7
T8
NOP
NOP
ACTIVE
NOP
Row
Row
Bank
tRP
Don’t Care
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128mb_x32_sdram.pdf - Rev. U 04/13 EN
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