128Mb Synchronous DRAM
P2V28S20ATP-7,-75,-8 (4-BANK x 8,388,608-WORD x 4-BIT)
P2V28S30ATP-7,-75,-8 (4-BANK x 4,194,304-WORD x 8-BIT)
P2V28S40ATP-7,-75,-8 (4-BANK x 2,097,152-WORD x 16-BIT)
DQM CONTROL
DQM is a dual function signal defined as the data mask for
writes and the output disable for reads. During writes, DQM(U,L)
masks input data word by word. DQM(U,L) to write mask latency
is 0. During reads, DQM(U,L) forces output to Hi-Z word by word.
DQM(U,L) to output Hi-Z latency is 2.
CLK
Command
DQM
DQ
DQM Function(CL=3)
Write
READ
D0
D2 D3
masked by DQM(U,L)=H
Q0 Q1
Q3
disabled by DQM(U,L)=H
JULY.2000
Page-30
Rev.2.2