Networking Silicon — 82545GM
Table 10. Link Interface Clock Requirements
Symbol
fGTXa
Parameter
GTX_CLK frequency
a. GTX_CLK is used externally for test purposes only.
Min
Typ
Max
Unit
125
MHz
Table 11. EEPROM Interface Clock Requirements
Symbol
Parameter
Min
Typ
Max
Unit
fSK
1
MHz
Table 12. AC Test Loads for General Output Pins
Symbol
Signal Name
CL
TDO
CL
APM_WAKEUP, PME#, SDP[7:6], SDP[1:0]
CL
EE_DI, EE_SK, FL_ADDR[18:0], FL_CS#, FL_OE#,
FL_WE#, FL_DATA[7:0]
CL
RX_ACTIVITY, TX_ACTIVITY, LINK_UP
Value
10
16
18
20
Units
pF
pF
pF
pF
Figure 3. AC Test Loads for General Output Pins
CL
5.5
Serial Interface Specifications
Table 13. Driver Characteristics
Symbol
Parameter
Min
Typ
Max
Units
VOD
Differential Output
Voltage Swinga
VOS
Delta VOD
Output Offset Voltage
Change
and 1b
in
VOD
between
0
875
1075
1325
1325
25
mV
peak-
peak
mV
mV
Datasheet
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