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PC82545GMSL87X View Datasheet(PDF) - Intel

Part Name
Description
MFG CO.
PC82545GMSL87X
Intel
Intel Intel
'PC82545GMSL87X' PDF : 55 Pages View PDF
82545GM — Networking Silicon
Table 13. Driver Characteristics
Symbol
Parameter
Min
Typ
Max
Units
RO
Differential Output
Impedance
80
ISA, ISB
Output Current on Short
to VSS
ISAB
Output Current when A
and B are Shorted
120
40
mA
12
mA
a. This is the maximum inside dimension of the eye pattern, measured on high and low data pat-
terns with pre-emphasis present. Load - 100 .
b. This is defined as an absolute value of amplitude jitter.
Table 14. Receiver Characteristics
Symbol
Parameter
Min
VID
Differential Input Voltage
Swing
100
RIN
Differential Input
Impedance
80
Typ
Max
Units
2000
mV
peak-
peak
120
5.6
Timing Specifications
Note: Timing specifications are preliminary and subject to change. Verify with your local Intel sales
office that you have the latest information before finalizing a design.
5.6.1
5.6.1.1
PCI/PCI-X Bus Interface
PCI/PCI-X Bus Interface Clock
Table 15. PCI/PCI-X Bus Interface Clock Parameters
Symbol
Parametera
PCI-X 133
MHz
PCI-X 66 MHz PCI 66MHz
Min Max Min Max Min Max
PCI 33 MHz
Min Max
Units
TCYC
TH
TL
CLK cycle time
CLK high time
CLK low time
CLK slew rate
RST# slew rateb
7.5
20
15
20
15
30
30
3
6
6
11
3
6
6
11
1.5
4
1.5
4
1.5
4
1
50
50
50
50
ns
ns
ns
4
V/ns
mV/ns
a. Rise and fall times are specified in terms of the edge rate measured in V/ns. This slew rate must be met across the minimum
peak-to-peak portion of the clock waveform as shown.
b. The minimum RST# slew rate applies only to the rising (de-assertion) edge of the reset signal and ensures that system noise
cannot render a monotonic signal to appear bouncing in the switching range.
30
Datasheet
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