NXP Semiconductors
PCF8531
34 x 128 pixel matrix driver
Table 11. Instruction set …continued
Instruction
I2C-bus
I2C-bus command byte
command[1]
Description
RS R/W DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
temperature control 0
0
0
0
1
0
0
TC2 TC1 TC0 set temperature
coefficient
test modes
0
0
0
1
X
X
X
X
X
X
do not use
(reserved for test)
VLCD control
0
0
1
VOP6 VOP5 VOP4 VOP3 VOP2 VOP1 VOP0 set VLCD register
[1] R/W is set to the slave address byte; Co and RS are set in the control byte.
Table 12.
Bit
PD
V
IM
H[1:0]
D and E
HVE
PRS
TC[2:0]
S[1:0]
Explanation for symbols in Table 11
0
chip is active
horizontal addressing
normal mode; full display + icons
[1] see Table 13
see Table 13
voltage multiplier disabled
VLCD programming range LOW
see Table 13
see Table 13
1
chip is in power-down mode
vertical addressing
icon mode; only icons are displayed
voltage multiplier enabled
VLCD programming range HIGH
[1] The bits H[1:0] identify the command page (use set default H[1:0] command to set H[1:0] = 0).
Table 13. Description of bits H, D and E, TC and S
Bits
Value Description
Command page (H)
H[1:0]
00
function and RAM command page
01
display setting command page
10
HV-gen command page
Display modes (D, E)
D and E
00
display blank
10
normal mode
01
all display segments
11
inverse video mode
PCF8531
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 6 — 16 May 2011
© NXP B.V. 2011. All rights reserved.
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