PCF8536AT/1 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

MFG CO.

PCF8536AT/1

Universal LCD driver for low multiplex rates including a 6 channel PWM generator

NXP Semiconductors. 

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NXP Semiconductors

PCF8536

Universal LCD low multiplex driver with 6 channel PWM generator

Columns

Display RAM columns/segment outputs (S)

012 34 56 7

0 b7

Rows

Display RAM rows/

backplane outputs

(BP)

1 b6

2 b5

3 b4

4 b3

5 b2

6 b1

7 b0

35 36 37 38 39

Fig 26. PWM register filling

b7 b6 b5 b4 b3 b2 b1 b0

MSB

LSB

Transmitted data byte

013aaa460

8.11 GPO output

The PCF8536 contains six independently configured GPO pins (GP0 to GP5). These

outputs, when enabled, will replace the function of the corresponding LCD segment

outputs.

Each GPO output can supply either a logic 1, a logic 0, or a PWM signal. The PWM signal

can be used to control the brightness of an LED.

The PWM generator has 128 possible levels allowing for an output with a variable duty

cycle between 0 % and 99.7 %. 100 % can only be achieved by a static 1 output.

The period of the PWM frame frequency described in Section 8.1.10 is divided into

128 time slots. The value in the PWM register determines for how many of these time

slots the PWM output is at logic 1.

Table 33. PWM generator

PWM register value Percentage of

ON time (%)

0

0

1

0.78

2

1.56

:

:

126

98.4

127

99.2

PWM duty cycle may be calculated by:

Time slots at 1

0

1

2

:

126

127

Time slots at 0

128

127

126

:

2

1

DutyCycle

=

P-----W-----M-----v---a----l--u---e-

128



100

(9)

PCF8536

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 1 — 6 October 2011

© NXP B.V. 2011. All rights reserved.

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