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PCF8813 View Datasheet(PDF) - Philips Electronics

Part Name
Description
MFG CO.
PCF8813
Philips
Philips Electronics Philips
'PCF8813' PDF : 72 Pages View PDF
Philips Semiconductors
(67 + 1) × 102 pixels matrix LCD driver
Product specification
PCF8813
10.1.3 START AND STOP CONDITIONS
Both data and clock lines remain HIGH when the bus is not
busy (see Fig.27). A HIGH-to-LOW transition of the data
line, while the clock is HIGH is defined as the START
condition (S). A LOW-to-HIGH transition of the data line
while the clock is HIGH is defined as the STOP
condition (P).
handbook, full pagewidth
SDA
SDA
SCL
S
START condition
SCL
P
STOP condition
MBC622
Fig.27 Definition of start and stop conditions.
10.1.4 ACKNOWLEDGE
Each byte of eight bits is followed by an acknowledge bit
(see Fig.28). The acknowledge bit is a HIGH signal put on
the bus by the transmitter during which time the master
generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an
acknowledge after the reception of each byte. Also a
master receiver must generate an acknowledge after the
reception of each byte that has been clocked out of the
slave transmitter. The device that acknowledges must
pull-down the SDA line during the acknowledge clock
pulse, so that the SDA line is stable LOW during the HIGH
period of the acknowledge related clock pulse (set-up and
hold times must be taken into consideration). A master
receiver must signal an end of data to the transmitter by
not generating an acknowledge on the last byte that has
been clocked out of the slave. In this event the transmitter
must leave the data line HIGH to enable the master to
generate a STOP condition.
handbook, full pagewidth
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
not acknowledge
acknowledge
SCL FROM
MASTER
1
2
S
START
condition
8
9
clock pulse for
acknowledgement
MBC602
Fig.28 Acknowledge on the I2C-bus.
2004 Mar 05
24
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