PCF8813 View Datasheet(PDF) - Philips Electronics
Part Name
Description
MFG CO.
'PCF8813' PDF : 72 Pages View PDF
Philips Semiconductors
(67 + 1) Ć 102 pixels matrix LCD driver
Product speciļ¬cation
PCF8813
11 INSTRUCTIONS
The PCF8813 interfaces via the 8-bit parallel interface, two
different 3-line serial interfaces, 4-wire serial interface or
an I2C-bus interface. Processing of the instructions does
not require the display clock.
In the case of the parallel and 4-wire serial interface, data
accesses to the PCF8813 can be divided into two areas;
those that define the operating mode of the device, and
those that fill the display RAM; the distinction being the
D/C input. When the D/C input is set to logic 0, the chip will
respond to instructions as defined in Table 5. When the
D/C bit is at logic 1, the chip will send data into the RAM.
When the 3-wire serial interface or the I2C-bus interface is
used, the distinction between instructions that define the
operating mode of the device and those that fill the display
RAM is made respectively by the display data length
instruction (4-line SPI) or by D/C bit in the data stream
(3-line serial interface and I2C-bus interface).
There are four types of instructions:
ā¢ Defining PCF8813 functions such as display
configuration, etc.
ā¢ Setting internal RAM addresses
ā¢ Performing data transfer with internal RAM
ā¢ Other instructions.
In normal use, category 3 instructions are used most
frequently. To lessen the MPU program load, automatic
incrementing by one of the internal RAM address pointers
after each data write is implemented.
Table 5 Instruction set
Instructions not expressly deļ¬ned in this table and reserved instructions are not allowed in PCF8813 applications.
INSTRUCTION
D/C
R/W DB7
(MSB)
DB6
COMMAND BYTE
DB5 DB4 DB3 DB2
DB1
DB0
(LSB)
DESCRIPTION
H = 0 or 1
NOP
Function set
Read status byte
Read status byte
Write data
00
0
0
0
0
0
0
0
0 no operation
00
0
0
1 MX MY PD V
H Power-down
control; entry
mode
01
0
0
0
1
1
0
Ī“(1) Ī“(1) read status byte
for serial and
I2C-bus interfaces
0 1 BUSY DON RES MF2 MF1 MF0 DS1 DS0 reads parallel
interface status
byte
1 0 D7 D6 D5 D4 D3 D2 D1 D0 writes data to
RAM
H=0
Reserved
00
0
0
0
0
0
1
X
X do not use
Display control
00
0
0
0
0
1
D
0
E sets display
conļ¬guration
Set lower/higher
program range
00
0
0
0
1
0
0
0 PRS VLCD programming
range
Set power control
00
0
0
0
1
0
0
1
PC switch HVgen
HVgen on/off
on/off
Display conļ¬guration 0 0
0
0
0
1
0
1
1
Ī“(1) double command
00
0
0
0
0
0
D0
0 BRS byte: set data
order; top/bottom
row swap mode
2004 Mar 05
28
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