PIC14000T-04/SS View Datasheet(PDF) - Microchip Technology
Part Name
Description
MFG CO.
'PIC14000T-04/SS' PDF : 153 Pages View PDF
7.3 Transfer Acknowledge
All data must be transmitted per byte, with no limit to
the number of bytes transmitted per data transfer. After
each byte, the slave-receiver generates an
acknowledge bit (ACK). This is shown in Figure 7-6.
When a slave-receiver doesn’t acknowledge the slave
address or received data, the master must abort the
transfer. The slave must leave SDA high so that the
master can generate the STOP (Figure 7-1).
If the master is receiving the data (master-receiver), it
generates an acknowledge signal for each received
byte of data, except for the last byte. To signal the end
of data to the slave-transmitter, the master does not
generate an acknowledge. The slave then releases the
SDA line so the master can generate the STOP. The
master can also generate the STOP during the
acknowledge pulse for valid termination of data
transfer.
If the slave needs to delay the transmission of the next
byte, holding the SCL line low will force the master into
a wait state. Data transfer continues when the slave
releases the SCL line. This allows the slave to move
the received data or fetch the data it needs to transfer
before allowing the clock to start. This wait state can be
FIGURE 7-7: SAMPLE I2C DATA TRANSFER
PIC14000
accomplished by setting SMHOG (MISC<7>) high.
Clearing MISC<7> will resume the data transfer.
Figure 7-7 shows a data transfer waveform.
Figure 7-8 and Figure 7-9 show master-transmitter and
master-receiver data transfer sequences.
FIGURE 7-6: I2C SLAVE-RECEIVER
ACKNOWLEDGE
Data
Output by
Transmitter
Data
Output by
Receiver
SCL from
Master
not acknowledge
1
2
acknowledge
8
9
S
Start
Condition
Clock pulse for
acknowledgement
SDA
MSB
SCL S
1
Start
Condition
acknowledgement
signal from receiver
byte complete.
acknowledgement
interrupt with receiver signal from receiver
clock line held low while
interrupts are serviced
2
7
8
9
1
Address
R/W ACK Wait
State
2
3•8
9
Data
ACK
P
Stop
Condition
© 1996 Microchip Technology Inc.
Preliminary
DS40122B-page 45
Share Link: 
