PM3350-SW View Datasheet(PDF) - PMC-Sierra
Part Name
Description
MFG CO.
'PM3350-SW' PDF : 224 Pages View PDF
ELAN 8X10
DATA SHEET
PMC-970109
ISSUE 3
PM3350 ELAN 8 X10
8 PORT ETHERNET SWITCH
device configuration resistors are merely resistor pull-ups and pull-downs that drive the
memory data bus lines to specific values during reset, as described later; the resistor
values used are not critical, and may range from 4.7k to 10k.
It is assumed that the minimum recommended configuration of 1 megabyte of DRAM
and 32 Kbytes of EPROM are used. A typical implementation would use two 256k x 16-
bit dual-CAS 60 ns Extended Data Out (EDO) DRAMs, together with a 256 kbit (32k x
8-bit) 150 ns EPROM. Larger memories may also be used if more buffer space or MAC
addresses are to be supported; if this is done, the configuration parameters in the
EPROM must be changed to reflect the increased memory size. The DRAM and
EPROM device types and speeds are defined by the setting of the pull-up / pull-down
resistors on the memory data bus at reset time.
The power-on reset generator can be created either from discrete components, or from
a low-cost CPU monitor; the ERST_ output from the ELAN 8x10 chip is strapped to the
reset signal to implement the watchdog capability of the ELAN device. Note that the
ERST_ output may, as an alternative, be used to signal some external processor that
the ELAN 8x10 device has encountered a fatal error condition requiring a software or
hardware reset; in this case, the ERST_ output should be pulled up using a 4.7k
resistor.
The LED register is implemented using a simple 8-bit TTL register with a clock enable
that is tied to the indicated chip select output from the ELAN 8x10. Eight LEDs may be
connected to the outputs of this register to present the diagnostic status codes output
by the ELAN 8x10 firmware during self-test, system boot and operation. If a simple TTL
register is used, the LED register is effectively write-only; writes to this register will
modify the state of the LEDs, but reads from this register return invalid values. A read-
back register can be used if this is a significant issue.
The first three chip select lines from the ELAN 8x10 (i.e., MCS_[0], MCS_[1] and
MCS_[2]) are tied to the DRAM, the EPROM and the LED register, respectively; the
remaining chip select is unused. This maps the DRAM into the first 4 MB bank of
address space, the EPROM into the second bank, and the LED register into the third
bank. The address map in the following subsection gives the 24-bit address ranges
assigned to each resource.
This system has only been presented to serve as a basis for the following discussion on
the device and system operation, and is not intended to serve as a complete example
or reference design. More details on actual system construction with the ELAN 8x10
may be found in the relevant application notes and reference design documents.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY
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