PM4328 View Datasheet(PDF) - PMC-Sierra
Part Name
Description
MFG CO.
'PM4328' PDF : 250 Pages View PDF
STANDARD PRODUCT
DATASHEET
PMC-2011596
Pin Name
ED[1]
ED[2]
ED[3]
ED[4]
ED[5]
ED[6]
ED[7]
ED[8]
ED[9]
ED[10]
ED[11]
ED[12]
ED[13]
ED[14]
ED[15]
ED[16]
ED[17]
ED[18]
ED[19]
ED[20]
ED[21]
ED[22]
ED[23]
ED[24]
ED[25]
ED[26]
ED[27]
ED[28]
ISSUE 1
PM4328 TECT3
HIGH DENSITY T1/E1 FRAMER
AND M13 MULTIPLEXER
Type Pin Function
No.
Input
This signal shares a pin with the H-MVIP signal
CMVFPB. By default this input is CEFP.
AB4 Egress Data (ED[1:28]). The egress data streams to
AA3 be transmitted are input on these pins. When the
P19 Clock Master modes are active, ED[x] is sampled on
N20 the active edge of ECLK[x], except for Clock Master:
N21 Serial Data and H-MVIP CCS, when ED[x] is sampled
N22 on the active edge of ICLK[x]. When the Clock Slave
A7 egress modes are active, ED[x] is sampled on the
A2 active edge of CECLK, except for Clock Slave: Clear
T2 channel mode when ED[x] is sampled on the active
R4 edge of ECLK[x].
A3
B4
In E1 mode only ED[1:21] are used.
N19 ED[1,5,9,13,17,21,25] share pins with the H-MVIP data
M22 signals MVED[1:7]. ED[2,6,10,14,18,22,26] share pins
D6 with the H-MVIP CAS signals CASED[1:7]. ED[1]
C7 shares a pin with the DS3 system interface signal
P2 TDATI. ED[2] shares a pin with the DS3 system
M1 interface signal TFPI/TMFPI.
D4 ED[7,8,11,12,15,16,19,20,23,24,27,28] shares pins
B6 with the SBI interface add bus signals.
C20
E22
A5
B5
L1
L2
A4
C5
PROPRIETARY AND CONFIDENTIAL
36
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