DATA SHEET
PMC-930303
ISSUE 6
PM5343 STXC
SONET/SDH TRANSPORT OVERHEAD TRANSCEIVER
Pin Name Pin Type Pin Function
No.
VDDI[0]
VDDI[1]
VDDI[2]
Power
Power
Power
45 Core power pins (VDDI[2:0]). These pins must
76
be connected to a common, well decoupled +5
VDC supply together with the VDDO[4:0] pins.
139
VSSI[0]
Gnd
VSSI[1]
Gnd
VSSI[2]
Gnd
50 Core ground pins (VSSI[2:0]). These pins must
75
be connected to a common ground together
with the VSSO[6:0] pins.
138
VDDO[0]
VDDO[1]
VDDO[2]
VDDO[3]
VDDO[4]
VDDO[5]
VDDO[6]
VDDO[7]
VSSO[0]
VSSO[1]
VSSO[2]
VSSO[3]
VSSO[4]
VSSO[5]
VSSO[6]
VSSO[7]
VT1
Power
Power
Power
Power
Power
Power
Power
Power
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Gnd
Input
35 Pad ring power pins (VDDO[4:0]). These pins
64
must be connected to a common, well
decoupled +5 VDC supply together with the
74 VDDI[2:0] pins. Care must be taken to avoid
86 coupling noise induced on the VDDO pins into
the VDDI pins.
103
130
137
154
34 Pad ring ground pins (VSSO[6:0]). These pins
65
must be connected to a common ground
together with the VSSI[2:0] pins.
77
85
102
129
136
159
13 The transmit PECL logic high reference (VT1)
pin must be connected to GND.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 33