PM5343STXC View Datasheet(PDF) - PMC-Sierra
Part Name
Description
MFG CO.
'PM5343STXC' PDF : 198 Pages View PDF
DATA SHEET
PMC-930303
ISSUE 6
PM5343 STXC
SONET/SDH TRANSPORT OVERHEAD TRANSCEIVER
Pin Name Pin Type Pin Function
No.
VT2
TAVD1
TAVD2
TAVD3
Input
Power
25 The transmit PECL logic low reference (VT2)
pin is used to control the logic low voltage level
of the output PECL pins, TXCO+/- and TXD+/-.
VT2 is engineered to sit at TAVD4 - 2.0 volts.
VT2 should be connected to TAVD4 through a
reference resistor. The PECL outputs have
been designed for optimum performance in a
50Ω transmission line environment. Under
these conditions, the reference resistor value is
recommended to be 630Ω, ±1%. Additional
details are provided in the Application
Examples section.
14 The power (TAVD1, TAVD2, TAVD3) pins for the
18
transmit PECL driver pads. These pins should
be connected to the PECL Driver Supply
20 (nominally VDD).
TAVD4
TAVS1
TAVS2
TAVS3
TAVS4
RAVD
RAVS
Reference 26
Ground 17
19
21
24
Reference 60
Ground 61
The reference (TAVD4) pin for the transmit
PECL circuitry. TAVD4 should be connected to
the Transmit Analog Reference Supply.
The ground (TAVS1, TAVS2, TAVS3, TAVS4)
pins for the transmit PECL pads. These pins
should be connected to GND.
The reference pin for the receive PECL
circuitry. RAVD should be connected to the
Receive Analog Reference Supply.
The ground (RAVS) pin for the receive PECL
pads. RAVS should be connected to GND.
Notes on Pin Description:
1. VDDI and VSSI are the +5 V and ground connections, respectively, for the
core circuitry of the device. VDDO and VSSO are the +5 V and ground
connections, respectively, for the pad ring circuitry of the device. These
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 34
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