PQFP208 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'PQFP208' PDF : 11 Pages View PDF
STi5500
CONFIDENTIAL II - PIN DESCRIPTION (continued)
II.2 - Pin List (continued)
Pin
Name
Type
SDRAM INTERFACE
Function
78-81, 69, 70, 71, 72, 73,
74, 82, 83
92, 93, 94, 97, 98, 99, 100,
101, 106, 107, 108, 109,
112-115
AD[0:11]
DQ[0:15]
O SDRAM Address Bus
I/O SDRAM Data (Lower Byte)
84, 85
NOT_SDCS0-1
O SDRAM Chip Selects
89
NOT_SDCAS
O SDRAM CAS
88
NOT_SDRAS
O SDRAM RAS
90
NOT_SDWE
O SDRAM Write Enable
104
MEMCLKIN
I SDRAM Memory Clock Input
76
MEMCLKOUT
O SDRAM Memory Clock Output
91
DQML
O DQ Mask Enable (Lower)
105
DQMU
O DQ Mask Enable (Upper)
ROM AND EXTERNAL MICROPROCESSOR
161-170, 173-183
ADR[1:21]
I/O External Memory Address Bus
141-148, 151-158
128
136
DATA[0:15]
NOT_RAS1_OR_HOLDREQ
READY
I/O External Memory Data Bus
O DRAM RAS or Bus Request to External Micro
O Hold off External Micro
133
121, 122
129
READNOTWRITE_OR_DMAACK I/O DRAM R/W Strobe or DMA Acknowledge from
External Micro
NOT_WE[0:1]
I/O Write Enable of SRAM
NOT_CAS0_OR_HOLDACK O/I DRAM CAS or Bus Grant from External Micro
132
124-126
NOT_CAS1_OR_NOT_DMAREQ O DRAM CAS or DMA Request (Ready) to
External Micro
NOT_CE[1:3]
O Chip Select for Banks 1 - 3
135
NOT_CS
I Chip Select to Access SDRAM
137
PPC_CLK
I Power PC System Clock
127
NOT_RAS0_OR_NOT_CE4
O DRAM RAS or Chip Select for Bank 0
134
DMAXFER
I DMA Transfer Control from External Micro
138
NOT_PPC_MODE
I Presence of Power PC
123
NOT_OE
I/O Output Enable of RAM / ROM
SDAV INERFACE
30
SDAV_CLK
I/O Data Strobe / CLK
31
SDAV_DATA
I/O Data Line
32
SDAV_DIR
O Direction for Transmit Truefer Transmit, Pulse
for Receive
33
OSC_IN
I/O 49.152MHz Crystal Input
NRSS INTERFACE
40
NRSS_CLK
O NRSS Serial Clock
42
NRSS_IN
I NRSS Serial Data Input
41
NRSS_OUT
O NRSS Serial Data Output
P1394 INTERFACE
30
P1394_CLK
I/O Data Strobe / CLK
31
P1394_DATA
I/O Data Line
32
P1394_P_CLK
I/O Packet Clock
4/11
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