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ST18AU1_DS View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST18AU1_DS
ST-Microelectronics
STMicroelectronics ST-Microelectronics
'ST18AU1_DS' PDF : 87 Pages View PDF
ST18-AU1
DLAi:
DAIi
Load address
0: DCAi content incremented after each data transfer (default)
1: DCAi content loaded with DIA content if DCCi value is 0, or DCAi content
incremented if DCCi value is not equal to 0
Address increment
0: DCAi content unchanged (default)
1: DCAi content modified according to DLAi state
DMS: Mask sensitivity control register
Two bits are dedicated to each DMA channel (bits 0 and 1 to channel 0, bits 4 and 5 to channel
1, bits 8 and 9 to channel 2, bits 12 and 13 to channel 3).
(Address = 0041, Reset = x3333h, Read/Write)
15 14 13 12 11 10 9
87
- - DSE3 DMK3 - - DSE2 DMK2 -
65
43
- DSE1 DMK1 -
21
0
- DSE0 DMK0
Bit
DMKi
DSEi
Function
DMA mask
0: DMA channel not masked
1: DMA channel masked (default)
DMA sensitivity
0: Low level
1: Falling edge (default)
43/87
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