SPDIFCR: SPDIF Output control register
ST18-AU1
Bit
0
1-2
3
4
5-15
Name
SPDIFen
WS
X/Y
V
Function
Enable
0
1
disabled
enabled
Word size
bit 1 bit 0
0
0
0
1
1
0
1
1
word size
16 bit
18 bit
20 bit
24 bit
Select X/Y for data read
0
Y (input buffer)
1
X (output buffer)
Validity bit
0
valid
1
defective
RESERVED, written as 0.
Note: write only register.
All bits of the SPDIFCR register are cleared on reset.
SPDIFPR0-2: 3x 16-bit SPDIF parallel registers
The SPDIFPR0-2 registers are 16 bit SPDIF parallel registers used for intermediate storage of
data. They are write only registers.
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