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ST18AU1_DS View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
ST18AU1_DS
ST-Microelectronics
STMicroelectronics ST-Microelectronics
'ST18AU1_DS' PDF : 87 Pages View PDF
ST18-AU1
7 OUTPUT SERIAL INTERFACE - PCM OUTPUT
The output serial interface organizes the PCM audio output into the required I2S serial format
and generates all the DAC control signals.
The PCM output interface can be programmed to meet various data formats and modes of
operation. The following parameters can be configured: word size, clock polarity, WS polarity,
delayed/non-delayed, start/end justified. They are defined by the content of the control register
PCMCR and are described below.
7.1 Output serial interface registers
PCMPRx0-x2 (x = 0, 1, 2): Data in parallel registers
The 9 PCMPR registers are 16-bit PCM parallel registers used for temporary storage of output
data.
For 16-bit format, only the PCMPRx0 and PCMPRx1 registers are used
respectively for channel 2 (right) and channel 1 (left).
For formats of greater than 16-bits, the PCMPRx2 registers are used for the
LSB:
channel 2 LSB on bits 7 to 0, left justified.
channel 1 LSB on bits 15 to 8, left justified.
Figure 7.1 PCMPR register example for 18-bit data words
t
PCMPR00
Bit15
ch2
17 16.........
Bit8 Bit7
Bit0
ch2
..... 2
PCMPR01
ch1
17 16.........
ch1
..... ..2
PCMPR02
ch1
10
unused
ch2
10
unused
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