ST18AU1_DS View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST18AU1_DS' PDF : 87 Pages View PDF
ST18-AU1
mute
play
Mute_en
-
Play Mute
0
0
0
1
1
0
1
1
no DMA req. serial out = 0 SCLK, WS not running
no DMA req. serial out = 0 SCLK, WS running
DMA req. serial out = ’data’ SCLK, WS running
DMA req. serial out = 0 SCLK, WS running
Mute enable
0
disable mute input
1
enable mute input
Bit mute is set by detection of falling edge on mute input
It is cleared by writing ‘0’ to it.
RESERVED, read as 0.
PCMDIV
On reset, the PCMDIV value is set to 0.
If the SPDIF transmitter is used:
• If output word size is greater than 16-bit, PCMDIV must be set to at least 1
(divide by 2) for correct generation of SPDIFCLK at twice the frequency of
SCLKPCM.
• If output word size is 16-bit, PCMDIV must be set to at least 2 (divide by 4).
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
--------
PCMDIV
Bit
PCMDIV
-
Function
PCMCLK divide factor
00000000
1
00000001
2
...
...
11111111
510
fPCMCLK= fMCLK_PCM/2(PCMDIV) if PCMDIV /= ‘00000
RESERVED, read as 0.
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