ST70235A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'ST70235A' PDF : 28 Pages View PDF
ST70235A
Analog Front End Control Interface
The Analog Front End Interface is designed to be
connected to the ST70134 Analog Front End
component.
Transmit Interface
The 16 bit words are multiplexed on 4 AFTXD
output signals. As a result 4 cycles are needed to
transfer 1 word. Refer to table 1 for the bit/pin
allocation for the 4 cycles.
The first of 4 cycles is identified by the CLWD
signal. Refer to Figure 18.
Figure 18 : Transmit Word Timing Diagram
The ST70235A fetches the 16 bit word to be
multiplexed on AFTXD from the Tx Digital
Front-End module.
Receive Interface
The 16 bit receive word is multiplexed on 4
AFRXD input signals. As a result 4 cycles are
needed to transfer 1 word.
Refer to Table 2 for the bit / pin allocation for the 4
cycles. The first of 4 cycles is identified by the
CLWD must repeat after 4 MCLK cycles.
MCLK
CLWD
AFTXD
GP_OUT
Cycle0 Cycle1 Cycle2 Cycle3
Test0
Test1 Test2 Test3
Figure 19 : Receive Word Timing Diagram
MCLK
CLWD
AFRXD
GP_IN(0)
Cycle0 Cycle1 Cycle2 Cycle3
Test0
Test1 Test2 Test3
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