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ST72321BR9-AUTO View Datasheet(PDF) - STMicroelectronics

Part Name
Description
MFG CO.
'ST72321BR9-AUTO' PDF : 247 Pages View PDF
ST72321Bxxx-Auto
Figure 24. Wait mode flowchart
Power saving modes
WFI INSTRUCTION
OSCILLATOR
PERIPHERALS
CPU
I[1:0] BITS
ON
ON
OFF
10
N
RESET
N
Y
INTERRUPT
Y
OSCILLATOR
ON
PERIPHERALS
OFF
CPU
ON
I[1:0] BITS
10
256 OR 4096 CPU CLOCK
CYCLE DELAY
OSCILLATOR
PERIPHERALS
CPU
I[1:0] BITS
ON
ON
ON
XX(1)
FETCH RESET VECTOR
OR SERVICE INTERRUPT
8.4
1. Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0] bits of the CC register are
set to the current software priority level of the interrupt routine and recovered when the CC register is
popped.
Active Halt and Halt modes
Active Halt and Halt modes are the two lowest power consumption modes of the MCU. They
are both entered by executing the ‘HALT’ instruction. The decision to enter either in Active
Halt or Halt mode is given by the MCC/RTC interrupt enable flag (OIE bit in MCCSR
register) as shown in Table 26.
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