ST7DALI
DALI COMMUNICATION MODULE (Cont’d)
11.4.4 General Description
The DCM is able to receive or transmit a serial
DALI signal using a 16-bit shift register, an edge
detector, several data/control registers and arbi-
tration logic.
The DCM receives the DALI standard signal from
the lighting control network, checks for errors and
loads the address/data bytes of a "forward frame"
to the corresponding DCMFA/DCMFD registers
and sends back the data byte of the "backward
frame" (written by software to the DCMBD regis-
ter) in DALI standard format.
The data rate can be changed by writing in the DC-
MCLK register ( fDATA = 2* fDALI).
fDATA = fCPU/[(N+1)*16]
The DALI standard data rate fDALI is 1.2 kHz. N is
the integer value of the DCMCLK register. Follow-
ing the above formula, if fCPU is 8 MHz, the integer
value of the DCMCLK register is "207". The bi-
phase bit period is 833.33 us ±10%.
The polarity of the bi-phase start bit is not config-
urable. The start bit is a logical ’1’.
The polarity of the 2 stop bits is not configurable.
The 2 stop bits are set to high level.
If an error is detected during reception, the frame
will be ignored and the DCM will return to Receive
state.
11.4.5 Functional Description
The user must write to the DCMCLK register to se-
lect the data rate according to the DALI signal fre-
quency.
After Reset, the DCM is in Receive state and waits
for the bi-phase start bit (logical ’1’) of the "forward
frame".
The DCM checks the data format of the "forward
frame" with the 4-bit pre-shift register. If an error
occurs during reception, the DCM will skip the data
and return to the Receive state.
If there is no error in the "forward frame", the data
will be shifted Most Significant Bit-first into the 16-
bit shift register. The address byte and the data
byte will be loaded to the corresponding DCMFA
and DCMFD registers. The DCM will send an in-
terrupt signal by setting the ITF bit in the DCMCSR
register.
If the software receives an interrupt signal from the
DCM, it reads the DCMFA and DCMFD registers.
Depending on the command, the DCM is able to
send back or receive data.
In an interrupt routine, the RTS bit has to be set ei-
ther before or at the same time as the RTA bit.
If the software asks the DCM to send back a
"backward frame", the software must first write to
the DCMBD register and switch the DCM to Trans-
mit state by setting the RTS and RTA bits in the
DCMCR register during the interrupt routine. The
DCMBD register will be shifted out from the 16-bit
shift register in DALI format, the Most Significant
Bit-first.
When the "backward frame" has been transmitted,
the DCM will send an interrupt signal by setting the
ITF bit in the DCMCSR register.
If the software asks the DCM to receive a "forward
frame", the software must switch the DCM to Re-
ceive state by clearing the RTS bit and setting the
RTA bit in the DCMCR register during the interrupt
routine.
If the ITF interrupt flag is set in the DCMCSR reg-
ister, the software must set the RTA bit in the DC-
MCR register to allow the DCM to perform the next
DALI signal reception or transmission.
The DALIIN signal is always taken into account by
the 4-bit pre-shifter.
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