ST7FLITE29 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7FLITE29
STMicroelectronics
'ST7FLITE29' PDF : 133 Pages View PDF
ST7LITE2
13.3.2 Operating conditions with Low Voltage Detector (LVD)
TA = -40 to 85°C, unless otherwise specified
Symbol
Parameter
Conditions
Min Typ Max Unit
VIT+(LVD)
Reset release threshold
(VDD rise)
VIT-(LVD)
Reset generation threshold
(VDD fall)
High Threshold
Med. Threshold
Low Threshold
High Threshold
Med. Threshold
Low Threshold
4.001) 4.25 4.50
3.40 1) 3.60 3.80
2.65 1) 2.90 3.15
3.80
4.05 4.30 1)
V
3.20 3.40 3.65 1)
2.40 2.70 2.901)
Vhys
VtPOR
tg(VDD)
IDD(LVD)
LVD voltage threshold hysteresis
VDD rise time rate 2)3)
Filtered glitch delay on VDD
LVD/AVD current consumption
VIT+(LVD)-VIT-(LVD)
Not detected by the LVD
200
mV
20
20000 µs/V
150
ns
220
µA
Notes:
1. Not tested in production.
2. Not tested in production. The VDD rise time rate condition is needed to insure a correct device power-on and LVD reset.
When the VDD slope is outside these values, the LVD may not ensure a proper reset of the MCU.
3. Use of LVD with capacitive power supply: with this type of power supply, if power cuts occur in the application, it is
recommended to pull VDD down to 0V to ensure optimum restart conditions. Refer to circuit example in Figure 84 on
page 112 and note 4.
13.3.3 Auxiliary Voltage Detector (AVD) Thresholds
TA = -40 to 85°C, unless otherwise specified
Symbol
Parameter
Conditions
VIT+(AVD)
VIT-(AVD)
Vhys
∆VIT-
1=>0 AVDF flag toggle threshold
(VDD rise)
0=>1 AVDF flag toggle threshold
(VDD fall)
AVD voltage threshold hysteresis
Voltage drop between AVD flag set
and LVD reset activation
High Threshold
Med. Threshold
Low Threshold
High Threshold
Med. Threshold
Low Threshold
VIT+(AVD)-VIT-(AVD)
VDD fall
Note:
1. Not tested in production.
Min
4.401)
3.901)
3.201)
4.30
3.70
2.90
Typ
4.70
4.10
3.40
4.60
3.90
3.20
150
0.45
Max
5.00
4.30
3.60
4.901)
4.101)
3.401)
Unit
V
mV
V
13.3.4 Internal RC Oscillator and PLL
The ST7 internal clock can be supplied by an internal RC oscillator and PLL (selectable by option byte).
Symbol
VDD(RC)
VDD(x4PLL)
VDD(x8PLL)
Parameter
Internal RC Oscillator operating voltage
x4 PLL operating voltage
x8 PLL operating voltage
tSTARTUP PLL Startup time
Conditions
Min Typ Max Unit
2.4
5.5
2.4
3.3
V
3.3
5.5
PLL
input
60
clock
(fPLL)
cycles
94/133
1
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