ST7LITE20F2 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
ST7LITE20F2
STMicroelectronics
'ST7LITE20F2' PDF : 170 Pages View PDF
ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
On-chip peripherals
Software can set the BA bit to activate the break function without using the BREAK pin.
● When the break function is activated (BA bit =1):
– the break pattern (PWM[3:0] bits in the BREAKCR) is forced directly on the PWMx
output pins (after the inverter),
– the 12-bit PWM counter is set to its reset value,
– the ARR, DCRx and the corresponding shadow registers are set to their reset
values,
– the PWMCR register is reset.
● When the break function is deactivated after applying the break (BA bit goes from 1 to
0 by software):
– the control of PWM outputs is transferred to the port registers.
Figure 38. Block diagram of break function
BREAK pin (Active low)
Note:
BREAKCR register
BA BPEN PWM3 PWM2 PWM1 PWM0
PWM0
PWM1
PWM2
PWM3
(Inverters)
1
PWM0
PWM1
PWM2
PWM3
0
When BA is set:
PWM counter -> Reset value
ARR & DCRx -> Reset value
PWM Mode -> Reset value
The BREAK pin value is latched by the BA bit.
Input capture
The 12-bit ATICR register is used to latch the value of the 12-bit free running upcounter after
a rising or falling edge is detected on the ATIC pin.
When an input capture occurs, the ICF bit is set and the ATICR register contains the value of
the free running upcounter. An IC interrupt is generated if the ICIE bit is set. The ICF bit is
reset by reading the ATICR register when the ICF bit is set. The ATICR is a read only
register and always contains the free running upcounter value which corresponds to the
most recent input capture. Any further input capture is inhibited while the ICF bit is set.
Doc ID 8349 Rev 5
77/166
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