STA310 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STA310' PDF : 90 Pages View PDF
STA310
Description:
This register controls the MLP downmix.
Bitfield
Description
DWNMIX 0x00: 2/0 (L / R)
[7:0] 0x01: 2/0(a) (Lo / Ro) (according to
bitstream0)
0x02: 3/0 (L, R, C)
0x03: 2/1 (L, R, S)
0x04: 3/1 (L, C, R, S)
0x05: 2/2 (L, R, Ls, Rs)
0x06: 3/3 (L, C, R, Ls, Rs)
For all other values there is no downmix.
(a) Downmix 1/0 (one channel only) is
forbidden in DVD audio
MLP_DRC
Dynamic range control
7
6
5
4
3
2
1
0
DRC[7:0]
Address : 0x6A
Type: R/W
Software Reset: NC
Hardware Reset:: UND
Description:
When this register = 0x00, the dynamic range control
is disabled. When 0x01, the dynamic range control is
enabled and the DRC information in the MLP stream
is used.
MLP_FORCE_DWS
Downsampling 192 to 96kHz or 176.4 to 88.2kHz
7
6
5
4
3
2
1
0
Reserved
Value
Address: 0x70
Type: R/W
Software Reset: NC
Hardware Reset: UND
Description:
This register selects whether downsampling is used
for input streams requiring sampling frequencies of
192KHz or 176.4KHz. When ’automatic’ is selected,
register is automatically updated to correspond to the
new output frequency.
Bitfield
Value
Description
00: Automatic (if Fs = 192KHz or 176.4KHz)
01: Automatic (if Fs = 192KHz or 176.4KHz)
10: No downsampling
MLP_LFE
Decode LFE
7
6
5
4
3
2
1
0
LFE[7:0]
Address: 0x68
Type: R/W
Software Reset: NC
Hardware Reset: UND
Description:
When this register = 0x00, LFE is not decoded and
when 0x01, LFE is decoded.
MLP_STATUS0
MLP status 0 register
7
6
5
4
3
2
1
0
Reserved
FS_CODE[4:0]
Address: 0x76
Type: R/W
Software Reset: NC
Hardware Reset: UND
Type:
This status register contains the sampling frequency
codes..
Bitfield
Description
FS_COD This list gives the codes and the
E[4:0] corresponding sampling frequency.
0x09: 44.1KHz
0x0A: 48KHz
0x0D: 88.2KHz
0x0E: 96KHz
0x11: 176.4KHz
0x12: 192KHz
0x1F: Undefined
The remaining codes are reserved.
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