STA310 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'STA310' PDF : 90 Pages View PDF
STA310
INIT_RAM
RAM initialization
7
6
5
4
3
2
1
Reserved
Address : 0xFF
Type: RO
Software Reset: 1
Hardware Reset: 0
0
RAM_INIT
Description:
The register is used to signal when the STA310 has finished to boot.
After a soft reset or a hardware reset, or a hardware reset, the host processor must wait until INIT_RAM hold
the value “1”.
the host can then start to configure the STA310 according to its application
APPENDIX A OVERVIEW OF THE CHIP
This STA310 is based on a very high performances low power general purpose DSP core, MMDSP+, and a set
of dedicated peripherals. Internal audio and system PLL allows to configure the chip for a wide range of audio
frequencies and DSP processing power (1 to 100 Mips).
A.1 Architectural Block Diagram
slave
I2C
Host
Parallel
Emulation
Sys PLL
Audio PLL
host
registers
768words
Ram
32 Kinstr
Ybus Rom
CNA interf 4x2
I2S/Sony
out
S/Pdiff
out
RS232
in/out
18Kx24256x24
Rom Ram
ST ASDSP
MMDSP+
core
15Kx24 4Kx16 1WS Mem
Ram Ram 64Kx8
DMA
pcm
Xbus
S/Pdif
in
I2S
in
Parallel
Data in
00 00 00
Packet
Parser
2048 bits
input FIFO
Audio
Parser
DMA x 3
Frame Buffer
32k x 8
Two
CRC
checkers
Dbit/Nbit
I2Sin
Second Serial Input
87/90
Share Link: 
