STA333BW View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
STA333BW
STMicroelectronics
'STA333BW' PDF : 67 Pages View PDF
STA333BW
Register description
To make the STA333BW work properly, the serial audio interface LRCKI clock must be
synchronous to the PLL output clock. It means that:
„ N-4< = (frequency of PLL clock) / (frequency of LRCKI) = < N+4 cycles,
where N depends on the settings in Table 12 on page 23
„ the PLL must be locked.
If these two conditions are not met, and IDE bit (register 0x05, bit 2) is set to 1, the
STA333BW immediately mutes the I2S PCM data out (provided to the processing block) and
it freezes any active processing task.
Clock desynchronization can happen during STA333BW operation because of source
switching or TV channel change. To avoid audio side effects, like click or pop noise, it is
strongly recommended to complete the following actions:
1. soft volume change
2. I2C read / write instructions
while the serial audio interface and the internal PLL are still synchronous.
Delay serial clock enable
Table 20. Delay serial clock enable
Bit R/W RST
Name
5
R/W
0
DSCKE
Description
0: no serial clock delay
1: serial clock delay by 1 core clock cycle to tolerate
anomalies in some I2S master devices
6.1.3
Channel input mapping
Table 21. Channel input mapping
Bit R/W RST
Name
6
R/W
0
C1IM
7
R/W
1
C2IM
Description
0: processing channel 1 receives left I2S Input
1: processing channel 1 receives right I2S Input
0: processing channel 2 receives left I2S Input
1: processing channel 2 receives right I2S Input
Each channel received via I2S can be mapped to any internal processing channel via the
Channel Input Mapping registers. This allows for flexibility in processing. The default
settings of these registers maps each I2S input channel to its corresponding processing
channel.
Configuration register C (addr 0x02)
D7
OCRB
1
D6
Reserved
0
D5
CSZ3
0
D4
CSZ2
1
D3
CSZ1
0
D2
CSZ0
1
D1
OM1
1
D0
OM0
1
FFX power output mode
The FFX power output mode selects how the FFX output timing is configured.
Doc ID 13773 Rev 3
27/67
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