STN1110 View Datasheet(PDF) - Unspecified
Part Name
Description
MFG CO.
'STN1110' PDF : 22 Pages View PDF
STN1110
on VDD transition high-to-low
IDD Operating Current(5)
IPD Power-Down Current(5)
CEFC External Filter Capacitor
connected to VCAP pin
—
60
90
mA
—
30
500
μA TA = -40°C, TA = +25°C
—
130
750
μA TA = +85°C
4.7
10
—
μF ESR < 5 Ω
Note
1. Data in Typ column is at 3.3V, 25°C, unless otherwise stated
2. VDD voltage must remain at VSS for a minimum of 200 μs to ensure POR
3. This spec must be met in order to ensure that a correct internal power-on reset (POR) occurs. It is easily achieved using most
common types of supplies, but may be violated if a supply with slowly varying voltage is used, as may be obtained through direct
connection to solar sells or some charge pump circuits.
4. This parameter is for design guidance only and is not tested in manufacturing
5. STN1110 device current only. Does not include any load currents
Table 3: I/O Pin DC Specifications
Sym
Characteristic
Min
Typ(1)
VIL Input Low Voltage
CAN_RX pin
all other inputs
VIH Input High Voltage
not 5V tolerant pins(2)
5V tolerant pins(2)
VIN ANALOG_IN Input Voltage
VOL Output Low Voltage
VOH Output High Voltage
IPU Internal Pull-up Current
VSS
—
VSS
—
0.7 VDD —
0.7 VDD —
AVSS
—
—
—
2.4
—
50
250
Note 1. Data in Typ column is at 3.3V, 25°C, unless otherwise stated
2. See “Pin Summary” section for the list of 5V tolerant pins
Max
0.3 VDD
0.2 VDD
VDD
5.5
AVDD
0.4
—
400
Units
Conditions
V
V
V
V
V
V IOL = 2 mA, VDD = 3.3V
V IOH = -2.3 mA, VDD = 3.3V
μA VDD = 3.3V, VPIN = VSS
Table 4: I/O Pin Timing Requirements
Sym
Characteristic
Min
TRST R¯E¯¯S¯E¯T Pulse Width (low)
2
TUWM Minimum UART Rx Pulse Width
—
required for wakeup (user settable)
15
TSTM Minimum S¯L¯E¯¯E¯P Input Time
—
to stay high before wakeup (user
1
settable)
Typ
Max Units
Conditions
—
—
μs
20
—
ns user setting < 15
—
65534
μs user setting ≥ 15
15
—
μs user setting = 0
—
65534
ms user setting > 0
STN1110DSA
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