Pin description
TDA7505
Table 2. Pin description (continued)
N°
Name
Type
Function
95 DACREF
A DAC reference voltage decoupling
N°
Name
Type
Voltage
Function
96 DACGND
S
0V
Analog Ground dedicated to the D/A converter.
N°
Name
Type
Function
97 DAC0
98 DAC1
99 DAC2
100 DAC3
A Signal output D/A converter (single ended)
A Signal output D/A converter (single ended)
A Signal output D/A converter (single ended)
A Signal output D/A converter (single ended)
Type: S: Supply pin
0: logic low output
PP: push-pull
I: Digital Input pin
1: logic high output OD: open drain
O: Digital Output pin E0: logic low input 5VT: 5 volt tolerant
A: Analog pin
E1: logic high input Schmitt-trigger on all inputs
Z: high impedance (Input mode of bi-directional pin)
*) I2C Master boot mode, using multiplexed debug interface (pin15: INT/RDSINT = 1, pin21: SSM = 0, pin52:
SRA15 = 0)
Figure 2. LQFP100 pins connection (top view)
DAC4
DAC5
VDD1V8_1
GND1V8_1
NRESET
SRCCD/MISOD
DSP0 GPIO0 SRCMD/MOSID
DSP0 GPIO1 INT/SSD
CLKIN/SCKD
AVDD
XTI
XTO
AGND
DSP0 GPIO2 RDSCS
DSP0 GPIO3 INT/RDSINT
VDD3V3_1
GND3V3_1
DSP0 GPIO4 SCL/SCKM
DSP0 GPIO5 ADDR/MISOM
DSP0 GPIO6 SDA/MOSIM
DSP0 GPIO7 SSM
DSRA<0>
DSRA<1>
DSRA<2>
DSRA<3>
1
2
3
4
5
6
7
8
SPDIF
DSPI
9
10
11
12
PLL
13
14
15
RDS
Bootsel0
16
17
18
19
20 BSPI/I2C
21
Bootsel1
22
23
24
25
CODEC
TDA7505
EMI
75
74
73
72
71
70
69
68
Debug/Test 67
66
65
64
63
SAI/SPDIF
62
61
60
59
58
57
56
55
54
53
Bootsel2 52
51
MPX_AM/FM-
MPX_AM+
LEVEL_AM/FM
GNDSUB_D
VDD1V8_3
INOUTK
Debug/Test_Sel1
Debug/Test_Sel0
DBIN_OS0
DSP0/1 GPIO11
DBOUT
DBCK_OS1
DSP0/1 GPIO10
DSP0/1 GPIO9
INOUTJ
INOUTI
DSP1 GPIO8
GND3V3_4
VDD3V3_4
INOUTH
DSP1 GPIO7
INOUTG
DSP1 GPIO6
INOUTF/SRA<21>/RAS DSP1 GPIO5
INOUTE/SRA<20> DSP1 GPIO4
INOUTD/SRA<19>
INOUTC/SRA<18>
DSP1 GPIO3
DSP1 GPIO2
INOUTB/SRA<17> DSP1 GPIO1
INOUTA/SRA<16> DSP1 GPIO0
SRA<15>
DSP0 GPIO8
SRA<14>
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