TDA9103 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TDA9103' PDF : 27 Pages View PDF
TDA9103
Figure 18 : SMPS Block Diagram
VREF
H-amp Reg-in
39 40
-
EA
RAP CYC
+
ISENSE
42
H-FREQ
+
-
Clamp
S
Basc
R
Buffer
22 SMPS
OUT
Figure 19 : SMPS Timing Diagram
41
Compensation
0.75T
H Osc
Sawtooth
SMPS Drive
SMPS Current
0.25T
6.4V
1.6V
Error Amplifier
Output (1.2V Max)
Figure 20 : H Scanning Amplitude Regulation Example
Step-up Converter
U0
TDA9103
Us ys t
H S can ning P art
H yoke
VREF
4.8V
S WITCHING
REGULATOR
Ha mp
Adjust
HDRIVE
Usyst is
a pproximatively
proportiona l
to Hfreq
Flyba ck Pe a k
Detection a nd Re gulation
The following functions are implemented in the
TDA9103 :
- A DC controlled variable gain amplifier allowing a
variation of ±14% of the voltage reference.
This is used to set the horizontal image ampli-
tude.
- An erroramplifier, the non inverting input of which
is connected to the above mentioned adjustable
voltage reference.
The inverting input and the output of the error
amplifier are externally accessible.
- A comparator which determines the conduction
of the external transistor by comparing the output
voltage of the error amplifier and the voltage
applied on Pin 42 (ISENSE), which is the image of
the current in the power transistor (current mode
principle).
- A flip-flop which memorizes the on or off state of
the power transistor.
- An output buffer stage (open collector).
16/27
Share Link: 
