TDA9112A
Table 8. I²C-bus control registers
Sad
D7
D6
D5
D4
D3
D2
D1
D0
10
1
HSIZE Horizontal size
0
0
0
0
0
0
0
PCAC Pin cushion asymmetry correction
11 Reserved
1
0
0
0
0
0
0
PARAL Parallelogram correction
12 Reserved
1
0
0
0
0
0
0
TCAC Top corner asymmetry correction
13 Reserved
1
0
0
0
0
0
0
BCAC Bottom corner asymmetry correction
14 Reserved
1
0
0
0
0
0
0
15
VDyCorPol
0: â€âˆª"
1
VDC-AMP Vertical dynamic correction
0
0
0
0
0
0
XRayReset
16 0: No effect
1: Reset
VSyncAuto VSyncSel
1: On
0:Comp
1:Sep
SDetReset
0: No effect
1: Reset
PLL1Pump
1,1: Fastest
0,0: Slowest
PLL1InhEn HLockEn
1: On
1: On
17
TV
0: Off(67)
TH
0: Off(67)
TVM
0: Off(67)
THM
0: Off(67)
BOHEdge HBOutEn VOutEn BlankMode
0: Falling 0: Disable 0: Disable 1: Perm.
Reserved
HVDC-HSHAP HVDyCor horizontal shape
18
0:
0
0
0
0
0
0
0
Reserved
EWSC East-West S-correction
19
0:
1
0
0
0
0
0
0
Reserved
EWWC East-West W-correction
1A
0:
1
0
0
0
0
0
0
Reserved
1B
0:
0
HEHTG Horizontal EHT compensation gain
0
0
0
0
0
0
Reserved
VEHTG Vertical EHT compensation gain
1C
0:
0
0
0
0
0
0
0
Reserved
VSAG Vertical size after-gain
1D
0:
1
1
1
0
0
0
0
Reserved
VPOF Vertical position offset
1E
0:
1
0
0
0
0
0
0
1F
ThrBlsense
0: High
BMute
0: Off
BSafeEn EWTrHSize Ident HLockSpeed HVDyCorPol HDCFlatEn
0: Disable 0: Tracking 0: No effect 0: Slow
0: â€âˆª"
0: Disable
READ MODE (SLAVE ADDRESS = 8D)
XX(66
HLock
) 0: Locked
1: Not locked
VLock XRayAlarm
Polarity detection
Sync detection
0: Locked 1: On
1: Not lock. 0: Off
HVPol
VPol
VExtrDet
HVDet
VDet
1: Negative 1: Negative 0: Not det. 0: Not det. 0: Not det.
Note 65: With exception of HDUTY and BREF adjustments data that can take effect instantaneously if switches
HDutySyncV and B+SyncV are at 0, respectively.
Note 66: In Read Mode, the device always outputs data of the status register, regardless of sub address previously
selected.
Note 67: The TV, TH, TVM and THM bits are for testing purposes and must be kept at 0 by application.
28/60