TDA9112A View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'TDA9112A' PDF : 60 Pages View PDF
TDA9112A
9.3.6 Output Section
The H-drive signal is inhibited (high level) during
flyback pulse, and also when VCC is too low, when
X-ray protection is activated (XRayAlarm I²C-bus
flag set to 1) and when I²C-bus bit HBOutEn is set
to 0 (default position).
The duty cycle of the H-drive signal is controlled
via I²C-bus register HDUTY. This is overruled dur-
ing soft-start and soft-stop procedures (see Section
9.3.7 and Figure 10).
The PLL2 is followed by a rapid phase shifting
which accepts the signal from H-moiré canceller
(see Section 9.3.8)
The output stage consists of a NPN bipolar tran-
sistor, the collector of which is routed to HOut pin
(see Figure 9).
Figure 9. HOut configuration
26 HOut
int. ext.
9.3.8 Horizontal moiré cancellation
The horizontal moiré canceller is intended to blur a
potential beat between the horizontal video pixel
period and the CRT pixel width, which causes vis-
ible moiré patterns in the picture.
It introduces a microscopic indent on horizontal
scan lines by injecting little controlled phase shifts
to output circuitry of the horizontal section. Their
amplitude is adjustable through HMOIRE I²C-bus
control.
The behaviour of horizontal moiré is to be opti-
mized for different deflection design configurations
using HMoiréMode I²C-bus bit. This bit is to be
kept at 0 for common architecture (B+ and EHT
common regulation) and at 1 for separated archi-
tecture (B+ and EHT each regulated separately).
The maximum amplitude adjustable though HMOI-
RE I²C-bus control is optimized according to selec-
tion by HMoiréMode I²C-bus bit: larger when B+
and EHT are each regulated separately, smaller
when B+ and EHT are common regulation.
9.3.7 Soft-start and soft-stop on H-drive
The soft-start and soft-stop procedure is carried
out at each switch-on or switch-off of the H-drive
signal, either via HBOutEn I²C-bus bit or after re-
set of XRayAlarm I²C-bus flag, to protect external
power components. By its second function, the ex-
ternal capacitor on pin HPosF is used to time out
this procedure, during which the duty cycle of H-
drive signal starts at its maximum (tHoff for soft
start/stop in electrical specifications) and slowly
decreases to the value determined by the control
I²C-bus register HDUTY (vice versa at soft-stop).
This is controlled by voltage on pin HPosF. In case
of supply voltage switch off, the transients on HOut
and BOut have different characteristics. See
Figure 10, Figure 11 and Section 9.8.1.
38/60
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