VIS
Preliminary
VG4616321B/VG4616322B
262,144x32x2-Bit
CMOS Synchronous Graphic RAM
Block of Columns
(selected by A3-A7 registered
coincident with Block Write command)
Row in Bank
(selected by A0-A9,
and BS registered
coincident with BankActivate
Command)
Column Mask
on the DQ
inputs
(registered
coincident
with Block
Write Command
DSF D Q
BankActivate CK
command
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQMO
MR0
Mask Register MR1
(previously loaded MR2
from corresponding MR3
DQ inputs
MR4
MR5
MR6
MR7
Note: Only lower byte is shown. The operation is identical for other bytes.
Block-Write Masking Block Diagram
Document:1G5-0145
Rev.1
Page 14