WM8742 View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'WM8742' PDF : 65 Pages View PDF
Production Data
WM8742
RIGHT JUSTIFIED MODE
In right justified mode, the LSB is sampled on the rising edge of BCLK preceding a LRCLK transition.
LRCLK is high during the left data word and low during the right data word.
Figure 15 Right Justified Mode Timing Diagram
I2S MODE
In I2S mode, the MSB is sampled on the second rising edge of BCLK following a LRCLK transition.
LRCLK is low during the left data word and high during the right data word.
Figure 16 I2S Mode Timing Diagram
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PD, Rev 4.3, February 2013
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