XRT7302IQ80 View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT7302IQ80' PDF : 77 Pages View PDF
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2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7302
REV. 1.1.0
• Pin 25 - RLB1
• Pin 30 - REQEN1
• Pin 31 - REQEN2
• Pin 36 - RLB2
• Pin 37 - LLB2
• Pin 39 - E3_Ch2
• Pin 41 - STS-1/DS3_Ch2
• Pin 59 - TAOS2
• Pin 60 - TxLEV2
The user is advised to tie each of these pins to GND
to operate the XRT7302 IC in the "Host" Mode.
In Host Mode Operation, the “TxOFF1” and “TxOFF2”
input pins can still be used to turn on or turn off the
“Transmit Output Drivers” within Channels 1 and 2,
respectively. The intent behind this feature is to per-
mit a system (designed for redundancy) to quickly
switch out a defective line card, and switch-in the
back-up line card.
The remainder of this document presents a detailed
description of the features associated with the
XRT7302 device.
FIGURE 6. FUNCTIONAL BLOCK DIAGRAM OF THE XRT7302 DEVICE
E3_Ch(n) STS-1/DS3_Ch(n) Host/HW
RLOL(n) ExClk(n)
RxClkINV
RTIP(n)
RRing(n)
REQEN(n)
RxOFF(n)
LOSTHR(n)
SDI
SDO
SClk
CS
REGR
TTIP(n)
TRing(n)
MTIP(n)
MRing(n)
DMO(n)
AGC/
Equalizer
Slicer
Clock
Recovery
Peak Detector
LOS Detector
Data
Recovery
Serial
Processor
Interface
Loop MUX
Invert
HDB3/
B3ZS
Decoder
Device
Monitor
Pulse
Shaping
HDB3/
B3ZS
Encoder
Transmit
Logic
Duty Cycle Adjust
Channel 1
RxClk(n)
RPOS(n)
RNEG(n)
LCV(n)
ENDECDIS
RLOS(n)
LLB(n)
RLB(n)
TAOS(n)
TPData(n)
TNData(n)
TxClk(n)
TxLEV(n)
TxOFF(n)
Channel 2
Notes: 1. (n) = 1 or 2 for the respective channel.
2. Serial Processor Interface pins are shared by both Channels in "Host" mode and are redefined in "Hardware" Mode.
1.0 SELECTING THE DATA RATE
Each channel within the XRT7302 device can be con-
figured to support the E3 (34.368 Mbps), DS3
(44.736 Mbps) or the SONET STS-1 (51.84 Mbps)
rates. Further, each channel can be configured to op-
erate in a mode/data rate that is independent of the
other channel.
The XRT7302 device permits the user to select the
data rate (for each Channel) via one of two ways.
1.1 CONFIGURING CHANNEL 1
a. When operating in the "Hardware" Mode.
In order to configure Channel 1 into the appropriate
mode, the user must set the "E3_Ch1", and the
"STS-1/DS3_Ch1 input pins to the appropriate logic
states, as presented below in Table 2.
27
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