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XRT7302IQ80 View Datasheet(PDF) - Exar Corporation

Part Name
Description
MFG CO.
XRT7302IQ80
Exar
Exar Corporation Exar
'XRT7302IQ80' PDF : 77 Pages View PDF
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2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
XRT7302
REV. 1.1.0
the "STS-1/(DS3_Ch2)" and "E3_Ch2" bit-fields, with- Table 5 relates the values of these two bit-fields to the
in Command Register CR12, as illustrated below.
selected data rates.
COMMAND REGISTER, CR12 (ADDRESS = 0X0C)
D4
D3
D2
D1
D0
X STS-1(/DS3_Ch2) E3_Ch2 LLB2 RLB2
x
x
x
x
x
TABLE 5: SELECTING THE DATA RATE FOR CHANNEL 2 (WITHIN THE XRT7302 DEVICE) VIA THE "E3_CH2" AND
"STS-1/DS3_CH2" BIT FIELDS, WITHIN COMMAND REGISTER CR4 (HOST MODE)
DATA RATE
E3 (34.368 Mbps)
DS3 (44.736 Mbps)
STS-1 (51.84 Mbps)
STATE OF E3_CH2 PIN
(PIN 39)
1
0
0
STATE OF STS-1/
(DS3_CH2) PIN
(PIN 41
X (Don't Care)
0
1
MODE OF B3ZS/(HDB3) ENCODER/DECODER
BLOCKS
HDB3
B3ZS
B3ZS
By making these selections, the user is doing the
following:
Configuring the VCO Center Frequency of the
Clock Recovery Phase-Locked-Loop (within Chan-
nel 2) to match the selected data rate.
Configuring the "B3ZS/(HDB3)" Encoder and
Decoder blocks to support B3ZS Encoding/Decod-
ing, if the DS3 or STS-1 data rates were selected;
or
Configuring the "B3ZS/(HDB3)" Encoder and
Decoder blocks to support HDB3 Encoding/Decod-
ing, if the E3 data rate was selected.
Configuring the on-chip "Pulse-Shaping" circuitry to
generate Transmit Output pulses, of the appropriate
shape and width to meet the applicable pulse tem-
plate requirement.
Establishes the LOS Declaration/Clearance Criteria
(for Channel 2). (See section 3.6)
NOTE: The user is required to apply the appropriate clock
signals to both the EXClk1 and EXClk2 input pins, in order
for the "Receive Sections" (of Channels 1 and 2) to function
properly.
2.0 THE TRANSMIT SECTION
Figure 6 indicates that the Transmit Section, within
each Channel of the XRT7302 device consists of the
following blocks:
Transmit Logic Block
The TxClk Duty Cycle Adjust Block
HDB3/(B3ZS) Encoder
Pulse Shaping Block
Each of these blocks will be discussed in some detail
below
In general, the purpose of the "Transmit Section",
within each Channel of the XRT7302 device, is to
take TTL/CMOS level data, from the terminal equip-
ment, and encode it into a format such that it can:
1. Be efficiently transmitted over coaxial cable; at
E3, DS3, or STS-1 data rates; and
2. Be reliably received by the Remote Terminal
Equipment at the other end of the E3, DS3, or
STS-1 data link.
3. Comply with the applicable pulse template
requirements.
The circuitry that the Transmit Section, (within each
Channel of the XRT7302 device) takes to accomplish
this goal is discussed below.
NOTE: The following discussion applies equally to both
Channels 1 and 2. Hence, the Transmit Section signals will
be referred to via their generic rates (e.g., TxClk) as
opposed to "TxClk1" and "TxClk2".
2.1 THE TRANSMIT LOGIC BLOCK
The purpose of the Transmit Logic Block is to accept
either Dual-Rail or Single Rail (e.g., a binary data
stream) TTL/CMOS level data and timing information
from the Terminal Equipment.
2.1.1 Accepting "Dual-Rail" Data from the Ter-
minal Equipment
29
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