XRT83SH38ES View Datasheet(PDF) - Exar Corporation
Part Name
Description
MFG CO.
'XRT83SH38ES' PDF : 78 Pages View PDF
XRT83SH38
8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.7
BIT
D[7:4]
D3
D2
D1
D0
TABLE 41: MICROPROCESSOR REGISTER 0X8CH BIT DESCRIPTION
GLOBAL REGISTER (0X8CH)
NAME
FUNCTION
Register
Type
Reserved Tese Register Bits are Not Used
R/W
LCVCH3 Line Code Violation Counter Select
R/W
LCVCH2
LCVCH1
LCVCH0
These bits are used to select which channel is to be addressed for
reading the contents in register 0x8Eh. It is also used to address
the counter for a given channel when performing an update or
reset on a per channel basis. By default, Channel 0 is selected.
0000 = None
0001 = Channel 0
0010 = Channel 1
0011 = Channel 2
0100 = Channel 3
0101 = Channel 4
0110 = Channel 5
0111 = Channel 6
1000 = Channel 7
Default
Value
(HW reset)
0
0
0
0
0
TABLE 42: MICROPROCESSOR REGISTER 0X8DH BIT DESCRIPTION
GLOBAL REGISTER (0X8DH)
BIT
NAME
FUNCTION
Register
Type
Default
Value
(HW reset)
D7
Reserved This Register Bit is Not Used
R/W
0
D6
Reserved This Register Bit is Not Used
R/W
0
D5
Reserved This Register Bit is Not Used
R/W
0
D4
allRST LCV Counter Reset for All Channels
R/W
0
This bit is used to reset all internal LCV counters to their default
state 0000h. This bit must be set to "1" for 1µS.
0 = Normal Operation
1 = Resets all Counters
D3
allUPDATE LCV Counter Update for All Channels
R/W
0
This bit is used to latch the contents of all 8 counters into holding
registers so that the value of each counter can be read. The chan-
nel is addressed by using bits D[3:0] in register 0x8Ch.
0 = Normal Operation
1 = Updates all Counters
67
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