Z86E7216PSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86E7216PSC' PDF : 74 Pages View PDF
Z86E72/E73
OTP IR Microcontrollers
Port 1 (P17-P10). Port 1 is a multiplexed Address (A7-A0) port (Figure 20). If more than 256 external locations are re-
and Data (D7-D0), CMOS compatible port. Port 1 is dedi- quired, Port 0 outputs the additional lines.
cated to the Zilog ZBus®-compatible memory interface.
The operations of Port 1 are supported by the Address
Port 1 can be placed in the high-impedance state along
1
Strobe (/AS) and Data Strobe (/DS) lines, and by the with Port 0, /AS, /DS, and R//W, allowing the Z86L7X to
Read/Write (R//W) and Data Memory (/DM) control lines. share common resources in multiprocessor and DMA ap-
Data memory read/write operations are done through this plications. Port1 can also be configured for standard port
output mode.
8
Z86LXX
MCU
Port 1
(I/O or AD7 - AD0)
Optional
Handshake Controls
/DAV1 and RDY1
(P33 and P34)
OEN
PAD
Out
In
R ≈ 500 KΩ
Auto Latch
Figure 15. Port 1 Configuration
DS96LVO1100
PRELIMINARY
1-21
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