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Z86E7216PSC View Datasheet(PDF) - Zilog

Part Name
Description
MFG CO.
Z86E7216PSC
Zilog
Zilog Zilog
'Z86E7216PSC' PDF : 74 Pages View PDF
Z86E72/E73
OTP IR Microcontrollers
FUNCTIONAL DESCRIPTION (Continued)
65535
External
Data
Memory
32,768
Bits 7-4 of register RP select the working register group.
Bits 3-0 of register RP select the expanded register file
bank. Note that expanded register bank is also referred
to as expanded register group (Figure 24).
The upper nibble of the register pointer (Figure 24) selects
which working register group of 16 bytes in the register file,
out of the possible 256, will be accessed. The lower nibble
selects the expanded register file bank and, in the case of
the Z86LXX family, banks 0, F, and D are implemented. A
0h in the lower nibble will allow the normal register file
(bank 0) to be addressed, but any other value from 1h to
Fh will exchange the lower 16 registers to an expanded
register bank.
For example:
Z86E73: (See Figure 23)
Not Addressable
R253 RP = 00H
R0 = Port0
R1 = Port1
R2 = Port2
R3 = Port3
But if:
0
Figure 21. External Memory Map
External Memory. The Z86E72/73 addresses up to 32
Kbytes (minus FD00H-FFFFH) of External Memory begin-
ning at address 8000H (32K+1), (Figure 27). External data
memory is included with, or separated from, the external
program memory space. /DM, an optional I/O function that
is programmed to appear on P34, is used to distinguish be-
tween data and program memory space. The state of the
/DM signal is controlled by the type of instruction being ex-
ecuted. An LDC opcode references PROGRAM (/DM inac-
tive) memory, and an LDE instruction references data
(/DM active Low) memory.
Expanded Register File. The register file has been ex-
panded to allow for additional system control registers,
and for mapping of additional peripheral devices into the
register address area. The Z8 register address space R0
through R15 has been implemented as 16 banks of 16 reg-
isters per bank. These register groups are known as the
ERF (Expanded Register File).
R253 RP = 0DH
R0 = CTRL0
R1 = CTRL1
R2 = CTRL2
R3 = Reserved
The counter/timers are mapped into ERF group D. Access
is easily done using the following example:
LD RP,#0DH
LD R0,#xx
LD 1,#xx
LD RP,#7DH
LD R1,2
Select ERF D for access and
register Bank 0 as the working
register group.
access CTRL0
access CTRL1
Select expanded register group
(ERF) group D for access and
register Bank 7 as the working
register bank.
CTRL2 register 71H
1-28
PRELIMINARY
DS96LVO1100
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