Z86E7216PSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86E7216PSC' PDF : 74 Pages View PDF
Z86E72/E73
OTP IR Microcontrollers
PIN FUNCTIONS (Continued)
Pin
I/O
Pref1
IN
P31
IN
P32
IN
P33
IN
P34
OUT
P35
OUT
P36
OUT
P37
OUT
P20
I/O
Notes:
HS = Handshake Signals
D = /DAV
R = RDY
C/T
IN
T8
T16
T8/16
IN
Table 4. Pin Assignments
Comp.
RF1
AN1
AN2
RF2
A01
A02
Int.
P0 HS
P1 HS
P2 HS
Ext
IRQ2
D/R
IRQ0
D/R
IRQ1
D/R
R/D
D/M
R/D
R/D
Comparator Inputs. In Analog Mode, Port 3 (P31 and
P32) have a comparator front end. The comparator refer-
ence is supplied to P33 and Pref1. In this mode, the P33
internal data latch and its corresponding IRQ1 is diverted
to the SMR sources (excluding P31, P32, and P33) as
shown in Figure 37. In digital mode, P33 is used as D3 of
the Port 3 input register which then generates IRQ1 as
shown in Figure 23.
Notes: Comparators are disabled/powered down by enter-
ing STOP mode. For P31-P33 to be used as a Stop-Mode
recovery source, these inputs must be placed into digital
mode.
Comparator Outputs. These may be programmed to be
outputted on P34 and P37 through the PCON register (Fig-
ure 22).
/RESET (Input, active Low). Initializes the MCU. Reset is
accomplished either through Power-On, Watch-Dog Tim-
er, Stop-Mode Recovery, Low Voltage detection, or exter-
nal reset. During Power-On Reset and Watch-Dog Timer
Reset, the internally generated reset drives the reset pin
Low for the POR time. Any devices driving the reset line
should be open-drain in order to avoid damage from a pos-
sible conflict during reset conditions. Pull-up is provided in-
ternally. There is no condition internal to the L7X that will
not allow an external reset to occur.
1-24
PRELIMINARY
DS96LVO1100
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