Z86L7808PSC View Datasheet(PDF) - Zilog
Part Name
Description
MFG CO.
'Z86L7808PSC' PDF : 59 Pages View PDF
Z86L78
IR/Low-Voltage Microcontroller
FUNCTIONAL DESCRIPTION (Continued)
Stop-Mode Recovery Register (SMR). This register se-
lects the clock divide value and determines the mode of
Stop-Mode Recovery (Figure 33). All bits are Write Only
except bit 7, which is Read Only. Bit 7 is a flag bit that is
hardware set on the condition of STOP recovery and reset
Zilog
by a power-on cycle. Bit 6 controls whether a low level or
a high level is required from the recovery source. Bit 5 con-
trols the reset delay after recovery. Bits D2, D3, and D4, of
the Stop-Mode Recovery signal. Bits D0 determines if
SCLK/TCLK are divided by 16 or not.
SMR (0F) 0B
D7 D6 D5 D4 D3 D2 D1 D0
SCLK/TCLK Divide-by-16
0 OFF **
1 ON
Reserved (Must be 0)
Stop-Mode Recovery Source
000 POR Only *
001 Reserved
010 P31
0 11 P32
100 P33
101 P27
11 0 P2 NOR 0-3
111 P2 NOR 0-7
Stop Delay
0 OFF
1 ON *
Stop Recovery Level
0 Low *
1 High
Stop Flag
0 POR *
1 Stop Recovery**
* Default Setting After Reset
** Default Setting After Reset and Stop-Mode Recovery
Figure 33. Stop-Mode Recovery Register
2-42
DS97LVO0701
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