ACS8509 SETS
ADVANCED COMMUNICATIONS
Table 14 Register Description (cont...)
FINAL
DATASHEET
Addr.
(Hex)
Register Name
35 cnfg_T4
Description
This controls DPLL _T4 (output on O4) and input source selection:
Default Value (Bin)
Bits (7:6) Unused.
Bit 5
=1
=0
Bit 4
=1
=0
DPLL_T4 is turned off (squelched).
DPLL_T4 is on (default).
Selects which DPLL (T4 or T0) source feeds output O4:
DPLL_T0 output is fed to output O4.
DPLL_T4 output is fed to output O4.
XX000000
37 cnfg_uPsel_pins
Bits (3:0) Input source selection. The device will switch to the source shown in this
field for the generation of the TOUT4 signal. If '0' it will select the highest priority active
TIN1.
This read only register returns a value indicating the microprocessor type selected at
power up or reset. This is set by the configuration of the UPSEL pins (pins 58 - 60). If
the UPSEL pin configuration is changed while the device is operating no effect will
take place, but this register will reflect that change, so indicating the configuration
that will be implemented at the next power up or reset.
The microprocessor type can be changed with the device operational, though register
7F.
Bits (7:3) Unused.
Bit (2:0)
000
001
010
011
100
101
110
111
Microprocessor type:
OFF (interface disabled),
EPROM,
MULTIPLEXED,
INTEL,
MOTOROLA,
SERIAL,
OFF (interface disabled),
OFF (interface disabled).
Bits(7:3)=
XXXXX
Bits(2:0)=
UPSEL
pin
configuration
Revision 2.00/January 2006 © Semtech Corp.
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