ACS8510 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8510' PDF : 69 Pages View PDF
ACS8510 Rev2.1 SETS
ADVANCED COMMUNICATIONS
FINAL
Register Map
Shaded areas in the map are ‘don’t care’ and writing either 0 or 1 will not affect any function of
the device.
Bits labelled ‘Set to 0’ or ‘Set to 1’ must be set as stated during initialisation of the device,
either following power up, or after a power on reset (POR). Failure to correctly set these bits may
result in the device operating in an unexpected way.
Some registers do not appear in this list. These are either not used, or have test functionality. Do
not write to any undefined registers as this may cause the device to operate in a test mode. If an
undefined register has been inadvertently addressed, the device should be reset to ensure the
undefined registers are at default values.
Table 11. Register Map
Addr. Parameter Name
(Hex)
00 chip_id
(read only)
01
02 chip_revision
(read only)
03 cnfg_control1
(read/write)
04 cnfg_control2
(read/write)
05 sts_interrupts
(read/write)
06
08 sts_T4_inputs
(read/write)
09 sts_operating_mode
(read only)
0A sts_priority_table
(read only)
0B
0C sts_curr_inc_offset
(read only)
0D
07
0E sts_sources_valid
(read only)
0F
Data Bit
7 (msb) 6
5
4
3
2
Device part number (7:0)
Device part number (15:8)
1
0 (lsb)
Chip revision number (7:0)
Multiple
E1/T1 O/P
Analog
div sync
Set to '0'
8k Edge
Polarity
Set to '0' Set to '0'
Phase loss flag limit
Set to '0'
Set to '1' Set to '0'
<I_8> valid <I_7> valid <I_6> valid <I_5> valid <I_4> valid <I_3> valid <I_2> valid <I_1> valid
change
change
change
change
change
change
change
change
Operating
mode
Main ref. <I_14> valid <I_13> valid <I_12> valid <I_11> valid <I_10> valid <I_9> valid
failed
change
change
change
change
change
change
T4 ref failed
Ami2
Violation
Ami2
L.O.S.
Ami1
Violation
Ami1
L.O.S.
Operating mode (2:0)
Highest priority valid source
3rd highest priority valid source
Currently selected reference source
2nd highest priority valid source
Current increment offset (7:0)
Current increment offset (15:8)
Current increment offset (18:16)
<I_8>
<I_7>
<I_6>
<I_14>
<I_5>
<I_13>
<I_4>
<I_12>
<I_3>
<I_11>
<I_2>
<I_10>
<I_1>
<I_9>
Revision 2.00/September 2003 Semtech Corp.
23
www.semtech.com
Share Link: 
