ACS8510 View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8510' PDF : 69 Pages View PDF
ACS8510 Rev2.1 SETS
ADVANCED COMMUNICATIONS
FINAL
Table 12. Register Map Description (continued).
Addr. Parameter Name
(Hex)
Description
sts_curr_inc_offset
This read-only register contains a signed-integer value representing the 19 significant bits of
the current increment offset of the digital PLL. The register may be read periodically to build
up a historical database for later use during holdover periods (this would only be necessary if
an external oscillator which did not meet the stability criteria described in Local Oscillator
Clock section is used). The register will read 00000000 immediately after reset.
0C
Bits (7:0) sts_curr_inc_offset bits (7:0)
Default
Value (bin)
00000000
0D
07
sts_sources_valid
0E
0F
sts_reference_sources
Bits (7:0) sts_curr_inc_offset bits (15:8)
Bits (7:3) Unused
Bits (2:0) sts_curr_inc_offset bits (18:16)
This register contains a bit to show validity for every reference source.
=1
Valid source
=0
Invalid source (default)
Bits (7:0) <I_8> to <I_1>
Bits (7:6) Unused
Bits (5:0) <I_14> to <I_9>
This is a 7-byte register which holds the status of each of the 14 input reference sources. The
status of each reference source is shown in a 4-bit field. Each bit is active high.To aid status
checking, a copy of each status bit 3 is provided in the sts_sources_valid register. The status
is reported as follows: (Each bit may be cleared individually)
00000000
XXXXX000
00000000
XX000000
Status bit 3 = Source valid (no alarms) (bit 3 is combination of bits (2:0)) (default 0)
Status bit 2 = out-of-band alarm (default 1)
Status bit 1 = no activity alarm (default 1)
Status bit 0 = phase lock alarm (default 0)
10
Bits (7:4) Status of input reference source <I_2>
Bits (3:0) Status of input reference source <I_1>
01100110
11
Bits (7:4) Status of input reference source <I_4>
Bits (3:0) Status of input reference source <I_3>
01100110
12
sts_reference_sources
(continued)
Bits (7:4) Status of input reference source <I_6>
Bits (3:0) Status of input reference source <I_5>
01100110
13
Bits (7:4) Status of input reference source <I_8>
Bits (3:0) Status of input reference source <I_7>
01100110
14
Bits (7:4) Status of input reference source <I_10>
Bits (3:0) Status of input reference source <I_9>
01100110
15
Bits (7:4) Status of input reference source <I_12>
Bits (3:0) Status of input reference source <I_11>
01100110
16
Bits (7:4) Status of input reference source <I_14>
Bits (3:0) Status of input reference source <I_13>
01100110
cnfg_ref_selection_priority
This register holds the priority of each of the 14 input reference sources. The priority values are
all relative to each other, with lower-valued numbers taking higher priorities. Only the values '1'
to '15' (dec) are valid - '0' disables the reference source. Each reference source should be
given a unique number, however two sources given the same priority number will be assigned
on a first in first out basis.
It is recommended to reserve the priority value '1' as this is used when forcing reference
selection via the cnfg_ref_selection register. If the user does not intend to use the
cnfg_ref_selection register then the priority value '1' need not be reserved.
Bits (7:4) Programmed priority of input reference source <I_2>
18
Bits (3:0) Programmed priority of input reference source <I_1>
00110010
Bits (7:4) Programmed priority of input reference source <I_4>
19
Bits (3:0) Programmed priority of input reference source <I_3>
01010100
Bits (7:4) Programmed priority of input reference source <I_6>
1A
Bits (3:0) Programmed priority of input reference source <I_5>
01110110
Bits (7:4) Programmed priority of input reference source <I_8>
1B
Bits (3:0) Programmed priority of input reference source <I_7>
10011000
Revision 2.00/September 2003 Semtech Corp.
29
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