ACS8514T View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
ACS8514T
Synchronous Equipment Timing Source Partner IC for 2nd T4 DPLL, Accurate Monitoring & Input Extender
Semtech Corporation
'ACS8514T' PDF : 86 Pages View PDF
ACS8514 SETS Buddy
ADVANCED COMMS & SENSING FINAL
DATASHEET
becomes available again before the activity or frequency
monitor rejection alarms have been raised, then the DPLL
will continue to lock to the input, with little disturbance. In
this scenario, with the DPLL in the "locked" state, the DPLL
uses "nearest edge locking" mode (±180° capture)
avoiding cycle slips or glitches caused by trying to lock to
an edge 360° away, as would happen with traditional
PLLs.
Interrupts for Activity Monitors
The loss of the currently selected reference source will
eventually cause the input to be considered invalid,
triggering an interrupt. The time taken to raise this
interrupt is dependant on the Leaky Bucket Configuration
of the activity monitors. The fastest Leaky Bucket setting
will still take up to 128 ms to trigger the interrupt. The
interrupt caused by the brief loss of the currently selected
reference source is provided to facilitate very fast source
failure detection if desired. It is triggered after missing just
a couple of cycles of the reference source. Some
applications require the facility to switch downstream
devices based on the status of the reference sources. In
order to provide extra flexibility, it is possible to flag the
mon_ref_failed interrupt (register 06, bit 6) on the pin
TDO. This is simply a copy of the status bit in the interrupt
register and is independent of the mask register settings.
The pin will, therefore, remain high until the interrupt is
cleared. This functionality is not enabled by default so the
usual JTAG functions can be used. The bit is reset by writing
to the interrupt status register in the normal way. This
feature can be enabled and disabled by writing to register
48, bit 6.
Leaky Bucket Timing
The time taken (in seconds) to raise an inactivity alarm on
a reference source that has previously been fully active
(Leaky Bucket empty) will be:
(cnfg_upper_threshold_n) / 8
where n is the number of the Leaky Bucket Configuration.
If an input is intermittently inactive then this time can be
longer. The default setting of cnfg_upper_threshold is 6,
therefore the default time is 0.75 s.
The time taken (in seconds) to cancel the activity alarm on
a previously completely inactive reference source is
calculated, for a particular Leaky Bucket, as:
[2 (a) x (b - c)]/ 8
where:
a = cnfg_decay_rate_n
b = cnfg_bucket_size_n
c = cnfg_lower_threshold_n
(where n = the number of the relevant Leaky
Bucket Configuration in each case).
The default setting is shown in the following:
[2 1 x (8 - 4)] /8 = 1.0 secs
Frequency Monitoring
The ACS8514 performs frequency monitoring to identify
reference sources which have drifted outside the
acceptable frequency range measured with respect to the
external TCXO/OCXO clock.
The sts_reference_sources (addresses 10 - 16h) out-of-
band alarm for a particular reference source is raised
when the reference source is outside the acceptable
frequency range. With the default register settings a soft
alarm is raised if the drift is outside ±11.43 ppm and a
hard alarm is raised if the drift is outside ±15.24 ppm.
Both of these limits are programmable from 3.8 ppm up to
61 ppm.
The ACS8514 DPLLs have a programmable lock and
capture range frequency limit up to ±80 ppm (default is
±9.2 ppm).
The following sections show the frequency monitor
features and corresponding registers:
Coarse frequency monitors:
(i) All 14 inputs measured in parallel to a 3.8 ppm
resolution. Measured over a 32 second interval.
(ii) Hard (rejection) alarm limit and soft (flag only) alarm
limit set in registers 49h & 4Ah. Alarm flags shown in
registers 10 h – 16h.
(iii) Makes measurement relative to external TCXO/
OCXO (Must set register 48h, bit7 to ‘1’).
(iv)Reports measured frequency in register 4Ch. Result
selected by register 4Bh.
Monitor DPLL:
(v) Measurement to 0.0003 ppm & +/- 80 ppm range.
Result at register 0Ch, 0Dh &07h. Register 4Bh, bit 4
at ‘0’ gives monitor DPLL result. Bit 4 at ‘1’ gives T4
DPLL result.
(vi)Measurement Result may be offset or calibrated by
registers 3Ch & 3Dh to +/- 500 ppm.
Revision 3.00 April 2007 © Semtech Corp.
Page 12
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