ACS8520 SETS
ADVANCED COMMUNICATIONS
Motorola Mode
FINAL
DATASHEET
In MOTOROLA mode, the device is configured to interface with a microprocessor using a 680x0 type bus as parallel
data + address. Figure 13 and Figure 14 show the timing diagrams of read and write accesses for this mode.
Figure 13 Read Access Timing in MOTOROLA Mode
tpw1
CSB
tsu2
th2
WRB
X
tsu1
X
th1
A
X address
Z
AD
td1
td3
data
RDY
Z
(DTACK)
td2
tpw2
th3
td4
Table 21 Read Access Timing in MOTOROLA Mode (for use with Figure 13)
Symbol
tsu1
tsu2
td1
td2
td3
td4
tpw1
tpw2
th1
th2
th3
tp
tp
Parameter
Setup A valid to CSBfalling edge
Setup WRB valid to CSBfalling edge
Delay CSBfalling edge to AD valid (consecutive Read - Read)
Delay CSBfalling edge to AD valid (consecutive Write - Read)
Delay CSBfalling edge to DTACKrising edge
Delay CSBrising edge to AD high-Z
Delay CSBrising edge to RDY high-Z
CSB Low time (consecutive Read - Read)
CSB Low time (consecutive Write - Read)
RDY High time (consecutive Read - Read)
RDY High time (consecutive Write - Read)
Hold A valid after CSBrising edge
Hold WRB valid after CSBrising edge
Hold CSB Low after RDYfalling edge
Time between (consecutive Read - Read) accesses (CSBrising edge to
CSBfalling edge)
Time between (consecutive Write - Read) accesses (CSBrising edge to
CSBfalling edge)
MIN
4 ns
0 ns
12 ns
16 ns
-
-
-
25 ns
25 ns
12 ns
12 ns
0 ns
0 ns
0 ns
15 ns
160 ns
X
Z
Z
F8110D_007ReadAccMotor_01
TYP
-
-
-
-
-
-
-
62 ns
193 ns
-
-
-
-
-
-
-
MAX
-
-
40 ns
192 ns
13 ns
10 ns
9 ns
-
-
49 ns
182 ns
-
-
-
-
-
Revision 3.02/October 2005 © Semtech Corp.
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