ACS8525T View Datasheet(PDF) - Semtech Corporation
Part Name
Description
MFG CO.
'ACS8525T' PDF : 112 Pages View PDF
ACS8525 LC/P
ADVANCED COMMUNICATIONS
Address (hex): 62
Register Name cnfg_output_frequency
(Output O1)
FINAL
DATASHEET
Description
(R/W) Register to configure and Default Value
enable the frequencies available
on Output O1.
1000 0000
Bit 7
Bit 6
Bit 5
output_freq_O1
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit No.
Description
Bit Value Value Description
[7:4]
[3:0]
output_freq_O1
Configuration of the output frequency available at
Output O1. Many of the frequencies available are
dependent on the frequencies of the APLL1 and the
APLL2. These are configured in Reg. 64 and
Reg. 65. For more detail see the detailed section on
configuring the output frequencies.
Not used.
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
-
Output disabled.
2 kHz.
8 kHz.
APLL1 frequency/2.
Digital1 (Reg. 39 cnfg_digital_frequencies).
APLL1 frequency.
APLL1 frequency/16.
APLL1 frequency/12.
APLL1 frequency/8.
APLL1 frequency/6.
APLL1 frequency/4.
APLL2 frequency/64.
APLL2 frequency/48.
APLL2 frequency/16.
APLL2 frequency/8.
APLL2 frequency/4.
-
Address (hex): 63
Register Name cnfg_output_frequency
(MFrSync/FrSync)
Description
Bit 7
MFrSync_en
Bit 6
FrSync_en
Bit 5
Bit 4
Bit No.
Description
7
6
[5:0]
MFrSync_en
Register bit to enable the 2 kHz Sync output
(MFrSync).
FrSync_en
Register bit to enable the 8 kHz Sync output
(FrSync).
Not used.
(R/W) Register to configure and Default Value
enable the frequencies available
on outputs MFrSync and FrSync.
1100 0000
Bit 3
Bit 2
Bit 1
Bit 0
Bit Value Value Description
0
Output MFrSync disabled.
1
Output MFrSync enabled.
0
Output FrSync disabled.
1
Output FrSync enabled.
-
-
Revision 3.01/August 2005 © Semtech Corp.
Page 78
www.semtech.com
Share Link: 
