Internal Reference Operation
A comparator within the AD9228 detects the potential at the
SENSE pin and configures the reference. If SENSE is grounded,
the reference amplifier switch is connected to the internal
resistor divider (see Figure 64), setting VREF to 1 V.
The REFT and REFB pins establish the input span of the ADC
core from the reference configuration. The analog input full-
scale range of the ADC equals twice the voltage of the reference
pin for either an internal or an external reference configuration.
If the reference of the AD9228 is used to drive multiple
converters to improve gain matching, the loading of the refer-
ence by the other converters must be considered. Figure 66
depicts how the internal reference voltage is affected by loading.
VIN + x
VIN – x
VREF
1µF
0.1µF
SENSE
SELECT
LOGIC
ADC
CORE
REFT
0.1µF
0.1µF
REFB
0.1µF
+
2.2µF
0.5V
Figure 64. Internal Reference Configuration
VIN + x
VIN – x
VREF
1µF
0.1µF
AVDD
SENSE
SELECT
LOGIC
ADC
CORE
REFT
0.1µF
0.1µF
REFB
0.1µF
+
2.2µF
0.5V
AD9228
External Reference Operation
The use of an external reference may be necessary to enhance
the gain accuracy of the ADC or to improve thermal drift
characteristics. Figure 67 shows the typical drift characteristics
of the internal reference in 1 V mode.
When the SENSE pin is tied to AVDD, the internal reference is
disabled, allowing the use of an external reference. The external
reference is loaded with an equivalent 6 kΩ load. An internal
reference buffer generates the positive and negative full-scale
references, REFT and REFB, for the ADC core. Therefore, the
external reference must be limited to a nominal 1.0 V.
5
0
–5
–10
–15
–20
–25
–30
0
0.02
0
–0.02
–0.04
–0.06
–0.08
–0.10
–0.12
–0.14
–0.16
–0.18
–40
0.5
1.0
1.5
2.0
2.5
3.0
3.5
CURRENT LOAD (mA)
Figure 66. VREF Accuracy vs. Load
–20
0
20
40
60
80
TEMPERATURE (°C)
Figure 67. Typical VREF Drift
Figure 65. External Reference Operation
Rev. B | Page 29 of 52